CSE306
Assignment on 8-bit MIPS Design and Simulation
1 DESIGN SPECIFICATION
- TherewillbeamultiplexedAddressandDatabuswith8-bitswidth.
- BothDataandaddresswillbeof8-bits.
- Youhavetouse/implement8-bitALU,hencethename8-bitMIPS.
- Youmusthavetodesignthefollowingtemporaryregisters:
$zero, $t0, $t1, $t2, $t3, $t4
All these registers will be of 8-bits and the assembly code that will be provided to simu- late your design will use only these mentioned registers.
- The Control unit should be microprogrammed. The control signals associated with the operations should be stored in a special memory (you can use a separate ROM for this purpose) units as Control Words.
- During the simulation, as Assembly Code will be given and you have to convert it into your designed MIPS machine code. The conversion process should be automatic. For example, you can write code in your preferred programming language for this conver- sion.
- Markswillvaryaccordingtotheefficiencyofdesign.
1
2 INSTRUCTION SET DESCRIPTION
Instruction ID
A B C D E F G H I J K L M N O P
Instruction Type
Instruction
Arithmetic add Arithmetic addi Arithmetic sub Arithmetic subi
Logic and Logic andi Logic or Logic ori Logic sll Logic srl Logic nor
Memory sw Memory lw
Control beq Control bneq Control j
3 MIPS INSTRUCTION FORMAT
Our MIPS Instructions will be 20-bits long with the following three formats.
- R-type
- I-type
- J-type
Opcode 4-bits
Opcode 4-bits
Opcode 4-bits
Src Reg 1 4-bits
Src Reg 1 4-bits
Src Reg 2 4-bits
Src Reg 2 4-bits
Dst Reg Shft Amnt 4-bits 4-bits
Address / Immediate 8-bits
0 0 4-bits 4-bits
Target Jump Address 8-bits
4 MEMORY CONSIDERATIONS
You need to consider three types of memory:
• InstructionMemory(accessedthroughprogramcounter,pc) • DataMemory(accessedthroughaddress)
• StackMemory(accessedthroughstackpointer,spSampleinstruction:sw$t0,0($sp)or lw $t1, 4($sp))
2
5 INSTRUCTION SET ASSIGNMENT
The opcodes of the instruction will be between 0 to 15 based on the sequence of instruction id given below. Sequence ABCDEFGHIJKLMNOP means add instruction’s opcode will be 0, addi instruction’s opcode will be 1, sub instruction’s opcode will be 2, and so on.
Group ID
1 2 3 4 5 6
Section A1 Section A2 Section B1 Section B2
LEJBHKFIGACONMPD AGOJPKFNCIMBLEHD GDOMBACPKFLENHJI AEHKFCIJLODNPBMG MPNGOKCJILFDBEAH JFMGKLNEPBCHDAIO DCJOGPAFBINHEKLM MPOEGBJAKHCILNFD OFLAJDBCEKIMNHPG HCNJKAGMBDEFPIOL EFLAIDPKCHOBNGMJ MDHKCPOALIENBGFJ FELDBNJKAIOHMGPC NFPKOLAJEIBHGMCD PGMAJLBFHNCKOEDI PJDKHOBAGNCFLIME HGIADLKMJBFECOPN CKPIBEJHDLFMGANO PEJHODFLNAKGBIMC MBJNKEFOGDHCALPI IDFGJMLHOKNCBEAP GOCFJDBLEMIAHPNK PNDBCAMLHIJOKEGF CDEFGMBOAJHIKPLN
6 REPORT CONTENT
Contents of the report are recommended as follows:
- Introduction
- InstructionSet
- CircuitDiagramprintedindrawingpaper(Willdiscussaboutthispointintheclass)
- Howtowriteandexecuteaprograminthismachine
- SpecialFeaturesImplementedifany(maycarrybonusmarks)
- ICsusedwiththeircount
- Discussion
