CSE306 Assignment 3-4-bit MIPS Design, Simulation, and Implementation (v1) Solved

4-bit MIPS Design, Simulation, and Implementation (v1)

In this assignment, you will design, simulate (in S/W), and implement (in H/W) a modified and reduced version of the MIPS instruction set.

1 DESIGN SPECIFICATION

• TheAddressbuswillbeof8bits.
• TheDatabuswillbeof4bits.
• Youhavetoimplement4-bitALU,hencethename4-bitMIPS.
• Youhavetodesignthefollowingtemporaryregisters:

  $zero, $t0, $t1, $t2, $t3, $t4

  All these registers will be of 4-bits, and the assembly code that will be provided to simu- late your design will use only these mentioned registers.

• The Control unit should be microprogrammed. The control signals associated with the operations should be stored in a special memory (you can use a separate ROM for this purpose) units as Control Words.
• During the simulation, an Assembly Code will be given, and you have to convert it into your designed MIPS machine code. The conversion process should be automatic. For this conversion, you can write code in your preferred programming language.
• Markswillvaryaccordingtotheefficiencyofdesign.

1

2 INSTRUCTION SET DESCRIPTION

Instruction ID

A B C D E F G H I J K L M N O P

Instruction Type

Instruction

Arithmetic add Arithmetic addi Arithmetic sub Arithmetic subi

Logic and Logic andi Logic or Logic ori Logic sll Logic srl Logic nor

Memory lw Memory sw

Control beq Control bneq Control j

3 MIPS INSTRUCTION FORMAT
Our MIPS Instructions will be 16-bits long with the following four formats.

• R-type
• S-type
• I-type
• J-type

Opcode 4-bits

Opcode 4-bits

Opcode 4-bits

Opcode 4-bits

Src Reg 1 4-bits

Src Reg 1 4-bits

Src Reg 1 4-bits

Src Reg 2 4-bits

Dst Reg 4-bits

Src Reg 2/Dst Reg 4-bits

Dst Reg 4-bits

Shamt 4-bits

Addr./Immdt. 4-bits

0 4-bits

Target Jump Address 8-bits

4 MEMORY CONSIDERATIONS

You need to consider three types of memory:
• InstructionMemory(accessedthroughtheprogramcounter,PC) • DataMemory(accessedthroughaddress)

• Bonus: Stack Memory (accessed through stack pointer, sp. Sample instruction: sw $t0, 0($sp) or lw $t1, 4($sp)), this will be used for push and pop instructions.

2

5 INSTRUCTION SET ASSIGNMENT

The opcodes of the instruction will be between 0 to 15 based on the sequence of instruction id given below. Sequence ABCDEFGHIJKLMNOP means add instruction’s opcode will be 0, addi instruction’s opcode will be 1, sub instruction’s opcode will be 2, and so on.

Group ID

1 2 3 4 5 6

Section A1 Section A2 Section B1 Section B2

GACONMPDLEJBHKFI CIMBLEHDAGOJPKFN KFLENHJIGDOMBACP LODNPBMGAEHKFCIJ ILFDBEAHMPNGOKCJ PBCHDAIOJFMGKLNE BINHEKLMDCJOGPAF KHCILNFDMPOEGBJA EKIMNHPGOFLAJDBC BDEFPIOLHCNJKAGM CHOBNGMJEFLAIDPK LIENBGFJMDHKCPOA AIOHMGPCFELDBNJK EIBHGMCDNFPKOLAJ HNCKOEDIPGMAJLBF GNCFLIMEPJDKHOBA JBFECOPNHGIADLKM DLFMGANOCKPIBEJH NAKGBIMCPEJHODFL GDHCALPIMBJNKEFO OKNCBEAPIDFGJMLH EMIAHPNKGOCFJDBL HIJOKEGFPNDBCAML AJHIKPLNCDEFGMBO

6 REPORT CONTENT

Contents of the report are recommended as follows:

• Introduction
• InstructionSet
• CircuitDiagramprintedindrawingpaper
• Howtowriteandexecuteaprograminthismachine
• SpecialFeaturesImplementedifany(maycarrybonusmarks)
• ICsusedwiththeircount
• Discussion