Description
Design a finite-state machine to generate the following sequence where the outputs and next state are dependent upon both the state of the circuit and the inputs. This is an up/down counter where the input (w) determines the direction of the counter. As show in the figure below, if the input, w=0, the sequence goes clockwise and if w=1, the sequence goes counter clockwise. The sequence just demonstrates a simple 4-bit up down counter.
- Create a state table for this finite state machine for the up/down counter.
| Present state | Next state | Output | ||||
| w=0 | w=1 | w=0 | w=1 | |||
| Clock | D | Q(t+1) |
| 0 | 0 | Q |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
- Explain how you could implement the same circuit with D flip-flops
State assignment
| Current state | Next state | Next state | ||||||||||||
| w=0 | w=1 | |||||||||||||
| Assignment | d3 | d2 | d1 | d0 | Assignment | D3 | D2 | D1 | D0 | Assignment | D3 | D2 | D1 | D0 |
D3(w=0) d1 d0 D3(w=1) d1 d0
d3 d2 0 0 0 1 1 1 1 0 d3 d2 0 0 0 1 1 1 1 0
| 0 0
0 1 1 1 1 0 |
||||||||
- 0
- 1
- 1
- 0
𝐷𝐷3 = _______________________________________________________________________________________________
D2(w=0) d1 d0 D2(w=1) d1 d0 d3 d2 0 0 0 1 1 1 1 0 d3 d2 0 0 0 1 1 1 1 0
| 0 0
0 1 1 1 1 0 |
||||||||
0 0
- 1
- 1
1 0
𝐷𝐷2 = _______________________________________________________________________________________________
D1(w=0) d1 d0 D1(w=1) d1 d0
d3 d2 0 0 0 1 1 1 1 0 d3 d2 0 0 0 1 1 1 1 0
| 0 0
0 1 1 1 1 0 |
||||||||
0 0
- 1
- 1
1 0
𝐷𝐷1 = _______________________________________________________________________________________________
D0(w=0) d1 d0 D0(w=1) d1 d0
d3 d2 0 0 0 1 1 1 1 0 d3 d2 0 0 0 1 1 1 1 0
| 0 0
0 1 1 1 1 0 |
||||||||
0 0
- 1
- 1
1 0
𝐷𝐷0 = _______________________________________________________________________________________________
Using the any of the internal clocks, add a clock into your code such that the counter will count up or down at a
1 second interval. You will need to write a separate module for this. Use SW[0] to control the direction (up/down)of the counter and SW[9] as a reset which puts the counter back to zero. Use one of the LEDS in the middle show the state of the slow clock. Use the 1st and last LED to show the state of w and reset. Use one of
the seven-segment displays to show the hexadecimal state of the machine. LEDs can be used to confirm the binary count and the slower clock. You may implement this counter using the D-latches as before or with some other “more efficient” code. Simulate the code and show it is working on the DE10 board.
