Lab 11
Morse Code Terminal
In this lab, you will display the decoded Morse code on a computer terminal. Specifically, you will replace the FIFO in the previous lab solution by a UART module (displayed in green below)
- Implement the system shown in the figure on the FPGA board
- The 650 connected to the TIMER_FINAL_VALUE, assumes a baud rate of 9600 bps
- The rd_uart signal should be connected to 0 because we are not using the rx
(receiver) part of the UART.
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Submission check list:
[ ] All Verilog code you generated or modified
[ ] All testbenches written
[ ] Embed all screenshot of your testbench output in your README.md
[ ] Embed all block diagram or state diagrams generated in your README.md
[ ] Short videos demonstrating each of the parts you implemented on the FPGA
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