1. Implement the 4-bit multiplier from Figure 1 below in VHDL. Submit the source and testbench code for the multiplier, and images of the waveform from the testbench results.
Figure 1 – 4-bit Multiplier
Figure 2 – Partial products for the 4-bit multiplier
2. Implement an 8-bit multiplier by extending the partial products and full-adders. While implementing the 8-bit multiplier, try to find patterns that could be used to generalize the code using generate statements to create an N-bit multiplier. Submit the source and testbench code for the multiplier, and images of the waveform from the testbench results.
NOTE: You may implement the 8-bit multiplier directly or by implementing an N-bit multiplier design and specifying N=8. If you create the N-bit design, you may use this to create your 4 bit instance for Q1.
HINT: Not the most elegant solution, but it may be easier to create N different (2*N – 1)-bit wide partial products and padding them with zeroes in order to align them (i.e., the rows in Fig.2), and then using N full-adders in each column.
