[SOLVED] EC605 Homework 4

1. [Single Cycle CPU]
   Consider the following instruction:
   And rd, Rn, Rm // Reg[Rd] = Reg[Rn] AND Reg[Rm]
   1. a)  What are the values of control signals generated by the single-cycle control for

      this instruction?

   2. b)  Which datapath resources (blocks) perform a useful function for this instruction?
   3. c)  Which datapath resources (blocks) produce no output for this instruction? Which

      resources produce output that is not used?

2. [Single Cycle CPU]
   Consider the following instruction mix:
   R-type: 24%; I-type: 28%; ldur: 25%; stur: 10%; cbz: 11%; b: 2%
   1. a)  What fraction of all instructions use the data memory?
   2. b)  What fraction of all instructions use the instruction memory?
   3. c)  What fraction of all instructions use the sign extend?
   4. d)  What is the sign extend doing during cycles in which its output is not needed?
3. [Single Cycle CPU]
   When silicon chips are fabricated, defects in materials and manufacturing errors can result in defective circuits. A very common defect is for one signal wire to get “broken” and always register a logical 0. This is called a “stuck-at-0” fault.
   1. a)  Which instructions fail to operate correctly if the MemToReg wire is stuck at 0?
   2. b)  Which instructions fail to operate correctly if the ALUSrc wire is stuck at 0?
   3. c)  Which instructions fail to operate correctly if the Reg2Loc wire is stuck at 0?
4. [Single Cycle CPU]
   Assume that during the current clock cycle the processor fetches the following instruction word: 0xF8014062.
   1. a)  What are the outputs of the sign-extend and the “shift left 2” unit for this

      instruction word?

   2. b)  What are the values of the ALU control unit’s inputs for this instruction?
   3. c)  What is the new PC address after this instruction is executed? List the path

      through which this value is determined.

   4. d)  For each mux, specify the values of its inputs and outputs. List the values that are

      register outputs at Reg[Xn].

   5. e)  What are the input values for the ALU and the two add units?
   6. f)  What are the values of all inputs for the register file?
5. [Single Cycle CPU]

a) What additional logic blocks, if any, are needed to add I-type instructions, such as

addi or andi, to the single-cycle CPU? Explain.

EC605 Computer Engineering Fundamentals, Fall 2021

b) List the values of the signals generated by the control unit for addi. Explain the reasoning for any “don’t care” control signals.

6. [Performance]
   Consider three different processors: P1, P2, and P3, executing the same instruction set. P1 has a 3GHz clock rate and a CPI of 1.5. P2 has a 2.5GHz clock rate and a CPI of 1.0. P3 has a 4.0GHz clock rate and a CPI of 2.2.
   1. a)  Which processor has the highest performance expressed in instructions per

      second?

   2. b)  If the processors each execute a program in 10 seconds, find the number of cycles

      and the number of instructions.

   3. c)  We are trying to reduce the execution time by 30%, but this leads to an increase

      of 20% in the CPI, What clock rate should we have to get this time reduction?

7. [Performance]
   Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (classes A, B, C, and D). P1 with a clock rate of 2.5GHz and CPIs of 1, 2, 3, and 3, and P2 with a clock rate of 3GHz and CPIs of 2, 2, 2, and 2.

   Given a program with a dynamic instruction count of 1.0*106 instructions divided into classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D, which is faster: P1 or P2?

   1. a)  What is the global CPI for each implementation?
   2. b)  Find the number of clock cycles required in both cases.