CSE 320  Computer Project #7 Solved

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Assignment Overview

 

This assignment develops familiarity with the instruction set architecture of the ARM microprocessor, as well as the format of its machine language instructions.

 

It is worth 40 points (4% of course grade) and must be completed no later than 11:59 PM on Thursday, 10/24.

 

Assignment Deliverables

 

The deliverables for this assignment are the following files:

 

proj07.makefile – the makefile which produces “proj07” proj07.support.c – the source code for your support module

 

Be sure to use the specified file names and to submit them for grading via the CSE handin system before the project deadline.

 

Assignment Specifications

 

The program will simulate the actions of the CPU during the fetch-execute cycle for the ARM microprocessor.

 

  1. The instructor-supplied driver module contains the definition of function “main” and some auxiliary functions. For each machine language instruction to be processed, it will simulate the steps of the fetch phase of the cycle and will then call function “execute” to simulate the steps of the execute phase.

 

  1. You will develop a support module which can be used to process a subset of the ARM machine language instructions. The interface to the support module is the following C function:

 

void execute();

 

Function “execute” will decode and process the instruction in the IR, then update the register file and the CPSR (when appropriate).  It will recognize only the 16 data processing instructions as legal instructions.

 

  1. The driver module and your support module will communicate using the following global data objects:

 

unsigned int IR, CPSR;

 

The driver module will place values into those two variables before calling function “execute”; function “execute” will use those values for its processing and will update variable “CPSR” before returning.

 

  1. In the CPSR, bits 31:28 are the integer condition codes and bit 0 is the illegal instruction flag (1 means illegal).

 

Assignment Notes

 

  1. Your driver module and your support module must be in separate source code files.

 

  1. Your source code must be translated by “gcc”, which is a C compiler and accepts C source statements.

 

  1. You must supply a “makefile” (named “proj07.makefile”), and that makefile must produce an executable program named “proj07”.

 

  1. Function “execute” will recognize the ARM data processing instructions, which have the following format:

 

Bits 31:26 111000
Bit 25  I bit
Bits 24:21 opcode
Bit 20  S bit
Bits 19:16 Rn
Bits 15:12 Rd
Bits 7:0  immediate value (when I=1)
Bits 3:0  Rm (when I=0)

 

All other bits will be 0 in a legal instruction.

 

The sixteen operation codes are given in the following table:

 

Opcode Mnemonic   Opcode Mnemonic
0000 and   1000 tst
0001 eor   1001 teq
0010 sub   1010 cmp
0011 rsb   1011 cmn
0100 add   1100 orr
0101 adc   1101 mov
0110 sbc   1110 bic
0111 rsc   1111 mvn

 

  1. Note that the functions in your support module cannot perform any input or output operations. All communication between the driver module and the support module will be done via the global variables.

 

  1. The file named “/user/cse320/Projects/project07.hardware.h” contains the following declarations (see the file for additional comments):

 

typedef unsigned int signal4; typedef unsigned int signal32;

 

extern unsigned int IR, CPSR;

 

void read_reg_file

(

  signal4,    /* RS1 selection signal */   signal4,    /* RS2 selection signal */   signal32*,  /* RS1 output port      */   signal32*   /* RS2 output port      */

); 

void write_reg_file

(

  signal4,    /* RD selection signal  */   signal32    /* RD input port        */

);

 

 

  • project07-evzwgx.zip